Serving the Critical Data Storage Needs
of Industrial and OEM Customers


Flash Storage Solutions for Embedded Designs
High Reliability Flash SSDs, Cards and Modules for Industrial Applications

Flash Memory Basics - Flash SSD Power Failure Corruption Prevention, Recovery and Test – Part 2

Posted by John Kuracek on Monday, 12 May 2014

This is a continuation of the discussion of Flash SSD Power Failure Corruption Prevention, Recovery and Test 

Flash Memory Basics

NAND Flash memory is the base storage medium of the Solid State Drives. A Flash memory cell works on the principle that there is a distinguishable stored charge inside the cell which corresponds to either a programmed or erased condition. A peripheral circuitry can check the status of the cell (read) and determine which state the cell is in. The greater the difference between the erased and programmed condition the easier it’s to distinguish the cell state.

During a Flash program operation, the logic circuit pumps electrical charge into the memory cell raising  the charge level to a distinguishable condition corresponding to one. During the erase operation, the charge is removed from the memory cell to the level corresponding to zero.

However, if a power disruption occurs during the cell charge or discharge operation, the cell could be left in an opposite or even more dangerously indistinguishable state. What makes this single cell failure truly catastrophic is the fact that NAND Flash memory architecture allows, multiple cells, called page, to be programmed concurrently. While this architectural advancement increases the programming throughput, it creates gross vulnerability for data integrity in case of power disruption.

MLC NAND Flash Architecture

The issue of power disruption during cell program or erase operation is exacerbated when using Multi Level Cell Flash (MLC) memory. The physical architecture of MLC Flash is that two different pages which could be non-contiguous (separated) share the same memory cell. As an illustration, if a program operation on page A in an MLC device is interrupted another page B could also be affected by the program interruption. The relative location of the paired page B may vary in the same device and also from manufacturer to manufacturer.

Please contact Fortasa for any information about power failure prevention of our Flash storage products.