FORTASA BLOG

Corruption Mechanism - Flash SSD Power Failure Corruption Prevention - Part 4

This is a continuation of the discussion of Flash SSD Power Failure Corruption Prevention, Recovery and Test 

Data Corruption Mechanism

During the typical drive operation, data is accessed by the host through either a read or write command to the memory system. The write command for Flash memory actually consists of two separate actions, an erase and subsequent program.

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Flash Controller Basics - Flash SSD Power Failure Corruption Prevention - Part 3

This is a continuation of the discussion of Flash SSD Power Failure Corruption Prevention, Recovery and Test 

Flash Controller Basics

To overcome the vulnerability of Flash memory to power glitches, memory system designers have utilized advanced memory management techniques. The most frequently used technique involves usage of Error Correction Code (ECC) to detect the failure and correct the data. The ECC algorithm calculates special code based on the user data and programs this code in the overhead space for each programmed page. When the data is read, the ECC algorithm verifies it against the calculated value. In case of discrepancy, the ECC algorithm can correct the read data (within certain statistical limitation) based on the stored special code. Depending on product specification, Fortasa Memory Systems solutions offer ECC correction capability substantially greater than is recommended by the Flash memory suppliers. This “safety measure” can correct upto 99% of data corruptions in a typical application.

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Flash Memory Basics - Flash SSD Power Failure Corruption Prevention, Recovery and Test – Part 2

This is a continuation of the discussion of Flash SSD Power Failure Corruption Prevention, Recovery and Test 

Flash Memory Basics

NAND Flash memory is the base storage medium of the Solid State Drives. A Flash memory cell works on the principle that there is a distinguishable stored charge inside the cell which corresponds to either a programmed or erased condition. A peripheral circuitry can check the status of the cell (read) and determine which state the cell is in. The greater the difference between the erased and programmed condition the easier it’s to distinguish the cell state.

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Flash SSD Power Failure Corruption Prevention, Recovery and Test - Part 1

Electronic systems are often vulnerable to power disruptions. Voltage spikes, brownouts, surges, blackouts and other power supply fluctuations destabilize system operation with typically unpredictable results. In general, once a power spike is detected, a system is reset to revert back to an expected and default condition.

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